# \#inputoutput

**URL:** https://scanalyst.fourmilab.ch/tag/inputoutput/4558.md

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## [Vacuum Tube Computer Part 33: Input/Output Address Decoding](https://scanalyst.fourmilab.ch/t/vacuum-tube-computer-part-33-input-output-address-decoding/3541)

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**Author:** [@johnwalker](https://scanalyst.fourmilab.ch/u/johnwalker)\
**Replies:** 0\
**Last updated:** [31 July 2023 13:10 UTC](https://scanalyst.fourmilab.ch/t/vacuum-tube-computer-part-33-input-output-address-decoding/3541 "2023-07-31T13:10:12Z")

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Data input and output for the vacuum tube computer uses three registers, each with individually addressable bits accessible from the processor: input, output, and scratch. Each register contains eight bits…