Looking Inside Intel's Forthcoming 56 Core Sapphire Rapids Xeon CPU

Der8auer managed to lay hands (via eBay!) on a pre-release copy of Intel’s next generation high-end server chip, the Xeon Scalable “Sapphire Rapids” 56 core processor. This processor uses Intel’s new “tile” or “chiplet” architecture, with multiple chips interconnected via the Intel Embedded Multi-die Interconnect Bridge (EMIB), a 2.5-dimensional silicon interconnect layer to which individual tiles are bonded with insanely dense (55 micrometre pitch) bonding bumps. The architecture of the four processor tiles is similar to the consumer “Alder Lake” processors, but also includes the AVX-512 vector instruction set and the new Advanced Matrix Extensions (AMX), which is similar to the tensor core in a GPU and intended for machine learning applications.

The video shows what’s inside the package. If you believe that some of the most complex artefacts ever created by the human species should be treated with respect (if not reverence), this can be painful to watch, as the de-lidding does not go well and is particularly destructive.

There are presently no motherboards available which support this chip’s socket, so it was not possible to determine whether this under-the-counter market exemplar was functional. It is just mindboggling that Intel has figured out how to make all of the multitude of minuscule inter-tile interconnects bond with 100% reliability at a mass-production scale. And just look at all of those connections on the outside of the package!

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Wow this is amazing stuff. I worked at Intel from 1997-2000. When I started, the Pentium 2 had recently released (this was peak ‘bunny suit’ era). It used the “Slot 1” design instead of ball-grid-array or pin-array for the CPU for 2 reasons – 1) getting the cache and CPU proper on the same die (they resided on separate dice at the time and were joined on the slot cartridge IIRC) and 2) creating a proprietary interface that could be patented so AMD chips couldn’t use the same motherboard (AMD came out with “Slot A”).

It was seeing the radical design of the AMD K6 that led to a side project that turned into the “Core” series of processors, and ended the superscalar Pentium IV line (that and the high power usage of the IV and the decreasing value of pipelining). Yay for competition!