Vacuum Tube Computer Part 33: Input/Output Address Decoding

Data input and output for the vacuum tube computer uses three registers, each with individually addressable bits accessible from the processor: input, output, and scratch. Each register contains eight bits, with individual bits selected by a three-bit field in the instruction. The responsibility of the address decoder is turning these three bits of address into eight individual signals which select the proper bit in the designated register. As is often the case, many of the tubes perform no logic function, but are simple cathode follower buffers that allow outputs of logic circuits to drive the required number of inputs in subsequent stages (fan-out).

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