Ken Shirriff has been reverse-engineering the Intel 8086 microprocessor, ancestor of the x86 architecture so widely used today. While scrutinising the decoder for the 8086’s already-baroque instruction set (see “How Many Intel x86 Instructions Are There?”, posted here in November 2021), he noticed some distinctly odd logic circuitry that looked nothing like its surroundings.
Digging deeper revealed that this logic recognises instructions that load (
POP a value into a segment register. The output is used to defer processing of a queued interrupt until the next instruction completes. This allows loading the stack segment and pointer as an atomic operation, avoiding the memory corruption which would occur if an interrupt were to be processed with the new stack segment address and old stack pointer still in effect.
Today’s processors allow updating their microcode at boot time, but in the 1970s, you had to patch the silicon and that’s what Intel did, as described in Ken’s analysis, “A bug fix in the 8086 microprocessor, revealed in the die’s silicon”.
Actually, Intel’s patch did more than it needed to. It delayed interrupt processing after a change to any segment register, while the problem occurred only after a load of
SS. I wondered about this when learning the 8086 instruction set, and never guessed it was a bug fix whose complexity was limited by what could fit within the existing silicon.
As it happens, the dreaded “plotter bug” in AutoCAD 2.1 years later was due to this programmer forgetting the order you had to load
SP and doing it backwards, which made the code vulnerable to an interrupt after the load of